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Design Verification Engineer
1 year ago(23/03/2017 21:46)
Annapurna Labs (U.S.) Inc.
Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries. We are seeking experienced Hardware Design Engineers to build the next generation of our cloud server platforms. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies.
As a member of the Engineering Team you’ll be responsible for the design and optimization of hardware in our data centers. You’ll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve your products performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.
· Verify and validate that our hardware and software solutions will achieve the functionality needed to enable our customers · Develop a deep understanding of the customer requirements and the architecture/micro-architecture of our solutions · Develop multi-faceted verification/validation strategies and plans that include advanced design verification, FPGA, emulation, software and full system testing · Define and implement leading edge verification/validation methodologies including using the cloud to enable breakthrough productivity · Efficiently execute test plans on multiple platforms, measure progress and metrics and have a clear understanding of the functionality this enables
· BS degree or higher in EE, CE, or CS
· 10 years or more of practical semiconductor design verification experience including System Verilog, UVM and coverage driven verification.
· Experience working at multiple levels of verification: unit test bench, emulation, FPGA, software environments and system testing
Experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design
Strong debug skills
Successfully verified multiple projects working with multiple level of logic: IP blocks to SoCs to full system testing
Proficient with industry standard tools and scripting languages for automation
Good understanding and knowledge of object oriented programming concepts
Proficient with C/C++ programming language
Customer obsessed and strong teamwork skills
Able to think big to define breakthrough methodologies
Excellent verbal and written communication skills
Proven ability to develop and deploy new DV methodologies